Semiconductor integrated circuit (IC) fabrication involves forming multiple material layers with designed patterns on a semiconductor wafer. Those patterned material layers on the semiconductor wafer are aligned and configured to form one or more functional circuits. Photolithography systems are used to pattern a semiconductor wafer. When semiconductor technology continues progressing to circuit layouts having smaller feature sizes, a lithography system with higher resolution is needed to image an IC pattern with smaller feature sizes. An electron-beam (e-beam) system is introduced for lithography patterning processes as the electron beam has the nature of high resolution due to its short wavelength. A conventional single electron beam lithography system can pattern small features to a wafer but the throughput is very slow. The corresponding fabrication cost and cycle time are not realistic for mass production. The introduction of multiple electron beams lithography system provides promising applications in terms of manufacturing cost and cycle time. However, the existing methods of fabricating IC devices have not been entirely satisfactory in all respects. For example, improvements of data processing algorithm, data bandwidth, digital pattern generators, devices, and process for reducing cycle time in an e-beam lithography system are desired.